Intel Can Now Mesh Different Process Nodes on the Same Chip
posted on September 01, 2017 17:02
One constant of CPU manufacturing for decades has been that different components on the same die must share a common process node. It’s certainly possible to build a package that combines, say, a 14nm CPU with a large pool of on-chip cache built at 22nm, or to have a CPU built at one process node that has a GPU built at a different process node adjacent to it, but on the same physical piece of silicon. Intel has used both approaches in the past.
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Samsung Electronics to invest $7 billion to boost China NAND chip output
posted on September 01, 2017 17:01
SEOUL (Reuters) - Samsung Electronics Co Ltd expects to invest $7 billion over the next three years to expand its NAND memory chip production in China’s northwestern city of Xi‘an, the South Korean tech giant said on Monday.
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Ruthenium Liners Give Way To Ruthenium Lines
posted on August 21, 2017 12:05
For several years now, integrated circuit manufacturers have been investigating alternative barrier layer materials for copper interconnects. As interconnect dimensions shrink, the barrier accounts for an increasing fraction of the total line volume. As previously reported, both cobalt and ruthenium have drawn substantial interest because they can serve as both barrier and seed layers, minimizing the amount of high resistance material required.
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What Is Spin Torque MRAM?
posted on August 21, 2017 12:04
Everspin’s CEO drills down into new memory types, why and where they’re needed, and why it’s so hard to develop them.
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Overcoming challenges in 3D NAND volume manufacturing
posted on August 21, 2017 12:03
Since its introduction several years ago, 3D NAND has become a mainstream technology because of its ability to increase bit density in memory devices. Its adoption has been accelerated by advances in the underlying manufacturing processes that are enabling 3D architectures and lowering the cost per bit. With all its advantages, however, the overall complexity and capital intensity of 3D NAND manufacturing add significantly to the challenges fabs are facing in terms of process control, yield, and economics.
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Samsung Promises 2018 Tbit NAND
posted on August 21, 2017 12:02
SAN JOSE, Calif. — Samsung sketched out plans for a terabit 3D-NAND chip that it will ship next year as well as dense solid-state drives using its current chips. It also said that it is sampling the Z-NAND products that it announced last year at latency levels that match or beat Intel’s 3DXP memories.
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Silicon wafer shortage starts in 2018
posted on August 21, 2017 12:01
TECHCET CA, an advisory service firm providing electronic materials information, today announced that the silicon wafer supply for semiconductor device fabrication is forecasted to appreciably lag demand starting next year, and could remain in shortage through the year 2021 despite investments in China. Silicon wafer area demand is forecasted to steadily increase at a CAGR of ~3.1% over the 2016-2021 period to reach over 13,000 million square inches (MSI).
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Qualcomm accuses Apple of infringing six patents in iPhone, iPad
posted on July 10, 2017 15:05
Chipmaker Qualcomm Inc (QCOM.O) will ask the U.S. International Trade Commission to bar Apple Inc (AAPL.O) from selling some iPhones and iPads in the United States that use chips made by competitor Intel Corp (INTC.O) on the grounds that the devices infringe on six Qualcomm patents.
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Micron Fab Incident Disrupts DRAM Supply
posted on July 10, 2017 15:04
SAN FRANCISCO — Suspension of production at a Taiwanese DRAM fab owned by Micron Technology will further disrupt an already tight global DRAM supply situation and lead to price increases, according to a market watcher.
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U.S. Seeks Life After Moore’s Law
posted on July 10, 2017 15:03
SAN JOSE, Calif. – A few dozen executives will gather next week at the first event to kick off what could become nearly a half billion dollar program to revitalize the U.S. electronics industry. An event the following week in Silicon Valley will seek input from the broader tech community on finding new materials, architectures and design processes for a post-Moore’s-law era.
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