Equipment Spending Slows but Still Positive in 2015 and 2016
posted on September 14, 2015 17:04
Front End fab equipment spending (including new, used, and in-house) is projected to increase 5.0 percent in 2015 (to US$ 37.0 billion) and another 6.6 percent in 2016 (to $39.4 billion) according to most recent edition of the SEMI World Fab Forecast. SEMI data indicates that some companies still plan to increase equipment spending in the second half of 2015, compared to the first half.
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Challenges At Advanced Nodes
posted on September 14, 2015 17:03
Semiconductor Engineering sat down to discuss finFETs, 22nm FD-SOI and how the how the market will segment over the next few years with Marie Semeria, CEO of Leti; Patrick Soheili, vice president of product management and corporate development at eSilicon; Paul Boudre, CEO of Soitec; and Subramani Kengeri, vice president of global design solutions at GlobalFoundries. What follows are excerpts of that conversation.
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IoT Is About Older Nodes, Cheaper Dev
posted on September 14, 2015 17:02
The upcoming IEEE S3S Conference 2015, Sonoma, CA, on October 5th thru 8th, will focus on key technologies for the IoT era. Here are some of the highlights in the upcoming event.
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Semiconductor outlook negative
posted on September 14, 2015 17:01
The semiconductor industry is expected to grow at an anemic 2 percent annually this year as demand for cell phones shrinks amid a stuttering macroeconomy and prolonged inventory correction, Taiwan Semiconductor Industry Association (TSIA, 台灣半導體產業協會) said yesterday.
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Molybdenum Ditelluride: Like 2-D Silicon, But Better
posted on September 01, 2015 11:05
A team of researchers from Korea and Japan have had a breakthrough with a semiconductor material that they claim could be a candidate to replace silicon in future electronics. In the 7 August issue of Science they report the creation of a transistor where the channel consists of layers of a two-dimensional material molybdenum ditelluride (MoTe2).
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Multiple Lithography Options Still Remain In Play
posted on September 01, 2015 11:04
The throughput and uptime of EUV, and the overlay accuracy of 193nm immersion lithography, continue to steadily improve, though neither is yet ready for 10nm production, according to speakers at SEMICON West.
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Interconnect Challenges Grow
posted on September 01, 2015 11:03
It’s becoming apparent that traditional chip scaling is slowing down. The 16nm/14nm logic node took longer than expected to unfold. And the 10nm node and beyond could suffer the same fate.
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How Long Will Finfets Last?
posted on September 01, 2015 11:02
Experts at the table, part one: What happens after FinFET; middle end of line; back end of line; improving FinFET now; sharing information.
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2.5D Creeps Into Soc Designs
posted on September 01, 2015 11:01
A decade ago top chipmakers predicted that the next frontier for SoC architectures would be the z axis, adding a third dimension to improve throughput and performance, reduce congestion around memories, and reduce the amount of energy needed to drive signals.
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CoolCube Circuit Stacking Moves to FinFET Process
posted on August 15, 2015 15:05
The CEA-Leti research laboratory at Grenoble France, has reported that its CoolCube 3D interconnect technology is suitable for use with FinFET manufacturing processes as well as with fully-depleted silicon-on-insulator manufacturing processes.
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