TSMC Tips 7+, 12, 22nm Nodes
posted on March 22, 2017 07:01
SANTA CLARA, Calif. — Trying to cover the waterfront, TSMC disclosed plans for new high-, mid- and low-end processes at an annual event here. They included an enhanced 7nm FinFET node using extreme ultraviolet lithography, a 12nm upgrade of its 16nm process and a 22nm planar technology — its answer to fully depleted silicon-on-insulator (FD-SOI).
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